• DocumentCode
    2617888
  • Title

    An algorithm for the reconfiguration of I/O buffers

  • Author

    Narasimhan, Jagannathan ; Nakajima, Kazuo

  • Author_Institution
    Maryland Univ., College Park, MD, USA
  • fYear
    1990
  • fDate
    1-3 May 1990
  • Firstpage
    336
  • Abstract
    A problem of reconfiguration of I/O buffers located on the periphery of a programmable gate array is considered. This problem is treated as a problem of shifting pebbles on a cycle. An O(mn) time algorithm is presented, where n and m are the numbers of all I/O buffers and used defective I/O buffers, respectively. A few lemmas are established that aid in the development of the algorithm
  • Keywords
    VLSI; circuit layout CAD; logic arrays; lemmas; problem of shifting pebbles; programmable gate array; reconfiguration of I/O buffers; Circuit faults; Circuit testing; Clocks; Costs; Electronics packaging; Programmable logic arrays;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1990., IEEE International Symposium on
  • Conference_Location
    New Orleans, LA
  • Type

    conf

  • DOI
    10.1109/ISCAS.1990.112032
  • Filename
    112032
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2617888