An improved sigma-delta modulator architecture

The performance of multibit sigma-delta coders is analyzed and compared with that which can be obtained from single-bit implementations. It is demonstrated that the fundamental difficulty with multi-bit designs is the requirement for a high-accuracy digital-to-analog converter (DAC) in the feedback loop. A general expression for the reduction of in-band noise power as a function of coder order, quantizer resolution, and oversampling ratio is derived, together with a subsidiary condition imposed by the use of multibit DACs in the network. A coder topology is proposed which uses multibit quantization with single-bit feedback, overcoming the manufacturing of calibration difficulties inherent in the use of high resolution DACs