Design of Low Power Consumption Cymometer Based on FPGA

The design mainly discussed the low power consumption cymometer´s circuit implementation plan. It is based on the most practical digital system simulation VHDL language. Then through compilation, simulation, downloaded to the FPGA device up with MAX+PLUS software, investigated cymometer´s practicable. And through the use of electronic circuit simulation EWB software verified cymometer´s correct in theory. Compare to the orther cymometer, it have a lot of advantages: It can measure the frequency of square wave signal, and show the frequency control with a digital display tube, By changing the program to reach the purpose of expanding measuring range, It also set up a range status display signal, when it excess the maximum range, it will alarm. But in addition to considering the cymometer´s small size, simple structure, high accuracy, well reliability and use convenient and so on, it´s low power consumption is a key in this design, and it incarnate this article´s significance.