DocumentCode
2619513
Title
Pulsewidth measurements using an integrated pulse shrinking delay line
Author
Rahkonen, Tim0 ; Kostamovaara, Juha
Author_Institution
Dept. of Electr. Eng., Oulu Univ., Finland
fYear
1990
fDate
1-3 May 1990
Firstpage
578
Abstract
A simple means for measuring pulse widths with nanosecond resolution is presented. The method is based on the use of a fully integrated delay line of CMOS gates having different rise and fall delays. The width of the pulse is decreased by each gate, and the vanishing point of the pulse is detected. Results showing a resolution of 2-3 ns are presented
Keywords
CMOS integrated circuits; delay lines; electric variables measurement; flip-flops; integrated logic circuits; time measurement; CMOS gates; RS flip flops; integrated delay line; nanosecond resolution; pulse shrinking delay line; pulsewidth measurements; Circuits; Delay effects; Delay lines; Flip-flops; Navigation; Propagation delay; Pulse measurements; Space vector pulse width modulation; Time measurement; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1990., IEEE International Symposium on
Conference_Location
New Orleans, LA
Type
conf
DOI
10.1109/ISCAS.1990.112125
Filename
112125
Link To Document