DocumentCode
2623885
Title
Effects of hardware bit width on the performance of 802.11n receiver
Author
Ibrahim, Muhammad Hamka ; Shin, Soo Young ; Kim, Dong Sung
Author_Institution
Wireless Embedded & Networking Syst. Lab., Kumoh Nat. Inst. of Technol., Gumi, South Korea
fYear
2012
fDate
15-17 Oct. 2012
Firstpage
210
Lastpage
213
Abstract
Bit width is a limitation of hardware implementation in baseband signal processing. It influences bit error rate (BER) performance and hardware complexity. This paper investigates BER performance of various bit width. We analyze bit width errors that come from quantization errors and clipping errors. As a result, it is shown that increasing bit width improves BER performance. At some point, increasing bit width does not enhance BER performance. This paper provides direction to determine optimum bit width value for 802.11n receiver design.
Keywords
error statistics; radio receivers; wireless LAN; 802.11n receiver design; BER performance; baseband signal processing; bit error rate performance; clipping errors; hardware bit effects; quantization errors; Bit error rate; Complexity theory; Hardware; IEEE 802.11n Standard; OFDM; Quantization; Receivers; 802.11n; ADC; Bit error rate; Bit width; Clipping; OFDM; Quantization; Wordlength;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications (APCC), 2012 18th Asia-Pacific Conference on
Conference_Location
Jeju Island
Print_ISBN
978-1-4673-4726-6
Electronic_ISBN
978-1-4673-4727-3
Type
conf
DOI
10.1109/APCC.2012.6388133
Filename
6388133
Link To Document