Design of a low output voltage DC/DC converter for telecom application with a new scheme for self-driven synchronous rectification

Author

Alou, P. ; Cobos, J.A. ; Uceda, J. ; Rascón, M. ; de la Cruz, E.

Author_Institution

Div. de Ingenieria Electron., Univ. Politecnica de Madrid, Spain

Volume

2

fYear

1999

fDate

14-18 Mar 1999

Firstpage

866

Abstract

In this paper, the design and experimental results of a very low output voltage DC/DC converter for a specific telecom application (1.5 V, 10 A) is presented and analyzed. Several topologies have been compared and analyzed, not only from the point of view of size (15 W/inch³, 10 mm of height) and efficiency (>85%), but also regarding the dynamic response of the converter to supply pulsating loads (80 A/μs). A new driving scheme for self-driven synchronous rectification (SDSR) is used. It allows use of the standard half bridge topology, which is very suitable for such a wide input voltage range (36 V-72 V)

Keywords

DC-DC power convertors; bridge circuits; dynamic response; rectification; telecommunication power supplies; 1.5 V; 10 A; 10 mm; 36 to 72 V; driving scheme; dynamic response; efficiency; low output voltage DC/DC converter; pulsating loads supply; self-driven synchronous rectification; standard half bridge topology; telecom application; Automatic logic units; Bridge circuits; Circuit topology; DC-DC power converters; Electronic mail; Low voltage; Power supplies; Power transformers; Rectifiers; Telecommunications;

fLanguage

English

Publisher

ieee

Conference_Titel

Applied Power Electronics Conference and Exposition, 1999. APEC '99. Fourteenth Annual

Conference_Location

Dallas, TX

Print_ISBN

0-7803-5160-6

Type

conf

DOI

10.1109/APEC.1999.750470

Filename

750470