DocumentCode
262619
Title
Session 2 overview: Ultra-high-speed transceivers and techniques: Wireline subcommittee
Author
Xilinx, Ken Chang ; Yamaguchi, Koichi
Author_Institution
San Jose, CA
fYear
2014
fDate
9-13 Feb. 2014
Firstpage
36
Lastpage
37
Abstract
The rise of cloud computing and mobile communications has driven an explosion in the need for data communication bandwidth, making efficient wireline transceivers that work at the limits of the process technology increasingly critical. Techniques to reduce the power consumed by the sophisticated equalization and clocking circuits necessary to operate over lossy electrical channels are therefore required. This session includes 9 papers in this area, addressing topics of 28Gb/s transceivers, a 60Gb/s transmitter, sub-250fJ/b equalizers at 16 to 25Gb/s, and robust TX equalization and clock generation/recovery designs.
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2014 IEEE International
Conference_Location
San Francisco, CA, USA
ISSN
0193-6530
Print_ISBN
978-1-4799-0918-6
Type
conf
DOI
10.1109/ISSCC.2014.6757548
Filename
6757548
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