A 2.60pJ/Inst Subthreshold Sensor Processor for Optimal Energy Efficiency

Author

Zhai, Bo ; Nazhandali, Leyla ; Olson, Javin ; Reeves, Anna ; Minuth, Michael ; Helfand, Ryan ; Pant, Sanjay ; Blaauw, David ; Austin, Todd

Author_Institution

Michigan Univ., Ann Arbor, MI

fYear

0

fDate

0-0 0

Firstpage

154

Lastpage

155

Abstract

A 2.6pJ/Inst subthreshold sensor processor designed for energy efficiency has been fabricated. A two-stage micro-architecture was implemented to mitigate the impact of process variation in subthreshold operation. Careful library cell selection and robust SRAM design enabled fully functional operation from 1.2V to 200mV. We analyze the variation in frequency and optimal voltage and evaluate the need for adaptive control. The processor reaches maximum energy efficiency at 360mV, consuming 2.6pJ/Inst at 833kHz. The minimum energy consumption of the core marks a 10times improvement over previous sensor processors at the same MIPS

Keywords

CMOS digital integrated circuits; instruction sets; integrated circuit design; microprocessor chips; sensors; 0.2 to 1.2 V; 833 kHz; SRAM design; adaptive control; library cell selection; optimal energy efficiency; process variation; subthreshold operation; subthreshold sensor processor; Circuits; Delay; Dynamic voltage scaling; Energy consumption; Energy efficiency; Frequency; Libraries; Pipelines; Random access memory; Resource description framework;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits, 2006. Digest of Technical Papers. 2006 Symposium on

Conference_Location

Honolulu, HI

Print_ISBN

1-4244-0006-6

Type

conf

DOI

10.1109/VLSIC.2006.1705356

Filename

1705356