DocumentCode
2628803
Title
A 12b 10MS/s Pipelined ADC Using Reference Scaling
Author
Ahn, G. ; Hanumolu, P.K. ; Kim, M. ; Takeuchi, S. ; Sugimoto, T. ; Hamashita, K. ; Takasuka, K. ; Temes, G. ; Moon, U.
Author_Institution
Sch. of EECS, Oregon State Univ., Corvallis, OR
fYear
0
fDate
0-0 0
Firstpage
220
Lastpage
221
Abstract
A 12b 10MS/s pipelined ADC using reference scaling achieves 62 dB SNDR and 72 dB SFDR for a 1MHz input. The prototype IC fabricated in a 0.35mum CMOS process employs interstage amplifiers with 45dB open-loop gain and consumes 19mW from a 2.4V supply
Keywords
CMOS integrated circuits; analogue-digital conversion; 0.35 micron; 1 MHz; 19 mW; 2.4 V; CMOS process; interstage amplifiers; pipelined ADC; reference scaling; CMOS integrated circuits; CMOS process; Capacitors; Energy consumption; Moon; Multimedia communication; Phased arrays; Prototypes; Voltage; Wireless communication;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits, 2006. Digest of Technical Papers. 2006 Symposium on
Conference_Location
Honolulu, HI
Print_ISBN
1-4244-0006-6
Type
conf
DOI
10.1109/VLSIC.2006.1705389
Filename
1705389
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