DocumentCode
2628843
Title
A 1V 30mW 10b 100MSample/s Pipeline A/D Converter Using Capacitance Coupling Techniques
Author
Honda, Kazutaka ; Masanori, Furuta ; Kawahito, Shoji
Author_Institution
Res. Inst. of Electron., Shizuoka Univ., Hamammatsu
fYear
0
fDate
0-0 0
Firstpage
224
Lastpage
225
Abstract
A 10b 100MSample/s pipeline A/D converter in 90nm process consumes 30mW at 1.0V power supply. The proposed capacitance coupling S/H stage and capacitance coupled class-AB amplifier achieve low distortion and low power dissipation at high-speed sampling. The SNDR and SFDR at 100MHz sampling are 54.0 dB and 70.0 dB, respectively
Keywords
CMOS integrated circuits; amplifiers; analogue-digital conversion; coupled circuits; 1 V; 10 bit; 100 MHz; 30 mW; 90 nm; capacitance coupling; class AB amplifier; pipeline A/D converter; CMOS process; Capacitance; Capacitors; Coupling circuits; Pipelines; Sampling methods; Signal sampling; Switches; Switching circuits; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits, 2006. Digest of Technical Papers. 2006 Symposium on
Conference_Location
Honolulu, HI
Print_ISBN
1-4244-0006-6
Type
conf
DOI
10.1109/VLSIC.2006.1705391
Filename
1705391
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