• DocumentCode
    2628850
  • Title

    A 10b 170MS/s CMOS Pipelined ADC Featuring 84dB SFDR without Calibration

  • Author

    Li, Jipeng ; Manganaro, Gabriele ; Courcy, Matthew ; Min, Byung-Moo ; Tomasi, Loren ; Alam, Arif ; Taylor, Ricky

  • Author_Institution
    Nat. Semicond., Salem, NH
  • fYear
    0
  • fDate
    0-0 0
  • Firstpage
    226
  • Lastpage
    227
  • Abstract
    A 0.85mm2 3.3V 10b 170MS/s CMOS pipelined ADC using opamp-sharing technique in a 0.35mum/0.18mum CMOS process is presented. The overhead of the opamp-sharing scheme is significantly reduced using 0.18mum-long devices as sampling switches and local regulators providing the switch drivers´ supply. With a 10MHz input signal, the ADC achieves 83.8dB SFDR and 9.36ENOB at 171MS/s. Better than 9.26ENOB are maintained for inputs up to 100MHz consuming 180mW at 3.3V
  • Keywords
    CMOS integrated circuits; analogue-digital conversion; driver circuits; operational amplifiers; 0.18 micron; 0.35 micron; 10 bit; 10 mHz; 180 mW; 3.3 V; CMOS pipelined ADC; local regulators; opamp sharing technique; sampling switches; switch drivers; CMOS process; Calibration; Circuit noise; Energy consumption; Linearity; Power amplifiers; Regulators; Switches; Transconductance; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Circuits, 2006. Digest of Technical Papers. 2006 Symposium on
  • Conference_Location
    Honolulu, HI
  • Print_ISBN
    1-4244-0006-6
  • Type

    conf

  • DOI
    10.1109/VLSIC.2006.1705392
  • Filename
    1705392
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2628850