Automatic synthesis of digital neural architectures

The authors consider digital VLSI implementation of layered feedforward neural networks. The main goal is to show that it is possible to fully automate the design of neural networks from a simple parametric description of the net model to final VLSI design. The architecture used is based on a pseudo neuron (PN) approach where the traditional bound, given by the one-to-one mapping of elementary processing elements to neurons, is relaxed in favor of a more flexible solution. In the PN approach, the amount of local memory assigned to each processing element does not constrain the cardinality of each layer. Two main results are discussed: a formal methodology for automated neural network implementation, and the design of one of the components of a neural cell library to be used with the automated design process