• DocumentCode
    2640281
  • Title

    Speeding Up SystemC Simulation through Process Splitting

  • Author

    Naguib, Youssef N. ; Guindi, Rafik S.

  • Author_Institution
    Dept. of Electron. & Commun. Eng., Cairo Univ., Giza
  • fYear
    2007
  • fDate
    16-20 April 2007
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    This paper presents a new approach that can be used to speed up SystemC simulations by automatically optimizing the model for simulation. The work addresses the inefficiency of the standard SystemC scheduler that may lead in some situations to unnecessary wake-up calls, as well as unnecessary code execution. The method presented analyzes the SystemC code to automatically extract signal dependencies based on a set of rules. This information is then used to split large processes into smaller ones. Process splitting is performed by a tool -SplitPro- which generates an optimized code that can be run on any standard SystemC engine. SplitPro was used to analyze the description of an Alpha super scalar processor and optimize some of its modules. A speed gain of up to 23% in simulation time was achieved over a number of split processes
  • Keywords
    hardware description languages; program processors; Alpha super scalar processor; SplitPro; SystemC code; SystemC scheduler; SystemC simulation; extract signal dependencies; process splitting; Clocks; Code standards; Data mining; Data structures; Digital systems; Engines; Kernel; Scheduling algorithm; Signal analysis; Signal processing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation & Test in Europe Conference & Exhibition, 2007. DATE '07
  • Conference_Location
    Nice
  • Print_ISBN
    978-3-9810801-2-4
  • Type

    conf

  • DOI
    10.1109/DATE.2007.364576
  • Filename
    4211781