A hardware implementation of neural network for the recognition of printed numerals

Much work has been undertaken to demonstrate the advantages of analog VLSI for implementing neural architectures. This paper attempts to address the issues concerning off-chip learning with analog VLSI multilayer perceptron networks. A 35-10-10 multilayer feedforward neural network for character recognition is implemented using current mode analog CMOS technology. The confusion matrix was introduced to evaluate the retrieval ability of the neural network, since perfect character recognition is, in general, not achieved. PSPICE electrical simulations are presented and discussed. These simulations proved the validity of our neural hardware implementation and the fact that numerical recognition could be easily implemented with off-chip learning techniques.