Heterogeneous Systems on Chip and Systems in Package

Author

O´Connor, I. ; Courtois, B. ; Chakrabarty, Krishnendu ; Hampton, M.

Author_Institution

Ecole Centrale de Lyon

fYear

2007

fDate

16-20 April 2007

Firstpage

1

Lastpage

6

Abstract

This paper discusses several forms of heterogeneity in systems on chip and systems in package. A means to distinguish the various forms of heterogeneity is given, with an estimation of the maturity of design and modeling techniques with respect to various physical domains. Industry-level MEMS integration, and more prospective microfluidic biochip systems are considered at both technological and EDA levels. Finally, specific flows for signal abstraction heterogeneity in RF SiP and for functional co-verification are discussed

Keywords

microfluidics; radiofrequency integrated circuits; system-in-package; system-on-chip; MEMS integration; RF SiP; maturity estimation design techniques; maturity estimation modeling techniques; microfluidic biochip systems; signal abstraction heterogeneity; systems in package; systems on chip; Computational modeling; Electronic design automation and methodology; Hardware; III-V semiconductor materials; Integrated circuit modeling; Micromechanical devices; Packaging; Radio frequency; Silicon; System-on-a-chip;

fLanguage

English

Publisher

ieee

Conference_Titel

Design, Automation & Test in Europe Conference & Exhibition, 2007. DATE '07

Conference_Location

Nice

Print_ISBN

978-3-9810801-2-4

Type

conf

DOI

10.1109/DATE.2007.364683

Filename

4211888