• DocumentCode
    2646789
  • Title

    Protocol verification using flows: An industrial experience

  • Author

    Leary, John O. ; Talupur, Murali ; Tuttle, Mark R.

  • fYear
    2009
  • fDate
    15-18 Nov. 2009
  • Firstpage
    172
  • Lastpage
    179
  • Abstract
    We prove the parameterized correctness of one of the largest cache coherence protocols being used in modern multi-core processors today. Our approach is a generalization of a method we described last year that uses data type reduction and compositional reasoning to iteratively abstract and refine the protocol and uses invariants derived from protocol ¿flows¿ to make the abstraction-refinement loop converge. Our prior work demonstrated the value of sequencing information that appeared within the linear flows describing a protocol in design documents. This paper extends the notion of flows to capture intricate scenarios seen in real industrial protocols and demonstrates that there is also valuable information in the interaction among flows. We further show that judicious use of flows is required to make the method converge and identify which flows are most suitable.
  • Keywords
    data reduction; protocols; cache coherence protocol; compositional reasoning; data type reduction; flows interaction; industrial protocol; parameterized correctness; protocol flows; protocol verification; sequencing information value; Coherence; Computer bugs; Convergence; Formal verification; Manuals; Multicore processing; Protocols; State-space methods; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Formal Methods in Computer-Aided Design, 2009. FMCAD 2009
  • Conference_Location
    Austin, TX
  • Print_ISBN
    978-1-4244-4966-8
  • Electronic_ISBN
    978-1-4244-4966-8
  • Type

    conf

  • DOI
    10.1109/FMCAD.2009.5351126
  • Filename
    5351126