Automatic parallelization experiments on 16PE NOC based MPSOC

Multi-processors system on chip (MPSOC) is emerging as solutions for high performance embedded systems. Although important work have been achieved in the design and implementation of such systems the issue of parallel software design have not yet been properly evaluated for these targets. We present in this work automatic parallelization experiment results on a 16PE NOC based MPSOC which we designed and implemented on a single FPGA chip. All reported results come from actual execution and show that speed-up becomes limited beyond 8 processors in this external memory constrained environment.