• DocumentCode
    2653976
  • Title

    Quality of service routing algorithm in the torusbased network on chip

  • Author

    Wang, Kun ; Wang, Changshan ; Gu, Huaxi

  • Author_Institution
    Sch. of Comput. Sci., Xidian Univ., Xi´´an, China
  • fYear
    2009
  • fDate
    20-23 Oct. 2009
  • Firstpage
    952
  • Lastpage
    954
  • Abstract
    Network on chip (NoC) is an emerging area and recognized as the future methodology for chip design. Provision of QoS in network on chip is a challenging problem and receives much attention recently. A QoS routing scheme is proposed to support various traffic with different QoS requirements in the interconnection networks of NoC. Specifically, three distributed QoS routing algorithms are developed based on different blocking handling methods. The algorithms use local information and are proven to be deadlock free and livelock free. Various strategies to handle blocking are utilized to lower the call failure rate. Simulations are carried on 3D torus topology. The results show that the proposed algorithms increase the network capacity by 30-40% (compared with the dimension order algorithm) and by 20-30% (compared with Duato´s algorithm).
  • Keywords
    integrated circuit interconnections; network-on-chip; quality of service; telecommunication network routing; local information; quality of service routing algorithm; torus-based network on chip; Chip scale packaging; Energy consumption; Internet; Multiprocessor interconnection networks; Network topology; Network-on-a-chip; Quality of service; Routing; System recovery; Telecommunication traffic; Network on chips; Quality of Service; Routing Algorithm;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC, 2009. ASICON '09. IEEE 8th International Conference on
  • Conference_Location
    Changsha, Hunan
  • Print_ISBN
    978-1-4244-3868-6
  • Electronic_ISBN
    978-1-4244-3870-9
  • Type

    conf

  • DOI
    10.1109/ASICON.2009.5351537
  • Filename
    5351537