Multibit ΔΣ CMOS DAC employing enhanced noise-shaped DEM architecture

Author

Akselrod, Dmitry ; Greenberg, Shlomo ; Hava, Shlomo

Author_Institution

Freescale Semicond. Israel Ltd., Herzelia, Israel

fYear

2004

fDate

13-15 Dec. 2004

Firstpage

117

Lastpage

120

Abstract

A multibit delta-sigma (ΔΣ) DAC employing enhanced noise-shaped dynamic element matching (DEM) architecture is presented. The architecture for implementing a noise-shaped DEM algorithm for use in multibit delta-sigma (ΔΣ) converters is analyzed. The suggested architecture shows the performance improvement as compared to previous solutions. System operation is discussed and hardware realization of the proposed architecture is described. A five-level ΔΣ digital-to-analog (D/A) converter incorporating the proposed DEM architecture has been fabricated in a 0.12-μm single-poly CMOS process. Finally, measured results are presented.

Keywords

CMOS integrated circuits; delta-sigma modulation; ΔΣ CMOS DAC; 0.12 micron; DEM architecture; delta-sigma DAC; delta-sigma converters; digital-to-analog converter; dynamic element matching; enhanced noise-shaped DEM; multibit CMOS DAC; performance improvement; single-poly CMOS process; Digital filters; Finite impulse response filter; Frequency response; Hydrogen; IIR filters; Interpolation; Logic; Low pass filters; Semiconductor device noise; Systems engineering and theory;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits and Systems, 2004. ICECS 2004. Proceedings of the 2004 11th IEEE International Conference on

Print_ISBN

0-7803-8715-5

Type

conf

DOI

10.1109/ICECS.2004.1399628

Filename

1399628