Study of low-temperature and post-stress hysteresis in high-k gate dielectrics

Author

Wu, You-Lin ; Lin, Shi-Tin ; Yang, Chang Cheng ; Wu, Chien-Hung ; Chin, Albert

Author_Institution

Nat. Chi Nan Univ., Puli

fYear

2007

fDate

12-14 Dec. 2007

Firstpage

1

Lastpage

2

Abstract

In this work, we present the comparison of hysteresis behaviors of HfAlON and HfSiON high-k dielectrics at low-temperature and subjected to constant voltage stress (CVS). The VFB instability in the HfAlON and HfSiON gate dielectric were deeply studied. A model is proposed to explain the VFB shift and hysteresis direction in thus two samples. We also treat the CVS voltage and CVS time dependence of hysteresis and VFB shift. Otherwise, the C-V hystereses were tested in a variety temperature system. The decreasing hysteresis with temperature is ascribed to the "freeze" traps.

Keywords

dielectric hysteresis; dielectric materials; dielectric thin films; hafnium compounds; silicon compounds; HfAlON; HfSiON; constant voltage stress; freeze traps; high-k gate dielectrics; hysteresis behavior; temperature system; Capacitance-voltage characteristics; Channel bank filters; Educational institutions; Electron traps; High-K gate dielectrics; Hysteresis; Polarization; Stress; Temperature; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Semiconductor Device Research Symposium, 2007 International

Conference_Location

College Park, MD

Print_ISBN

978-1-4244-1892-3

Electronic_ISBN

978-1-4244-1892-3

Type

conf

DOI

10.1109/ISDRS.2007.4422317

Filename

4422317