Efficient implementation of the keyed-hash message authentication code (HMAC) using the SHA-1 hash function

Author

Michail, H.E. ; Kakarountas, A.P. ; Milidonis, A. ; Goutis, C.E.

Author_Institution

Dept. of Electr. & Comput. Eng., Patras Univ., Greece

fYear

2004

fDate

13-15 Dec. 2004

Firstpage

567

Lastpage

570

Abstract

In this paper, an efficient implementation, in terms of performance, of the keyed-hash message authentication code (HMAC) using the SHA-1 hash function is presented. This mechanism is used for message authentication in combination with a shared secret key. The proposed hardware implementation can be synthesized easily for a variety of FPGA and ASIC technologies. Simulation results, using commercial tools, verified the efficiency of the HMAC implementation in terms of performance and throughput. Special care has been taken so that the proposed implementation does not introduce extra design complexity; while in-parallel functionality was kept to the required levels.

Keywords

application specific integrated circuits; cryptography; field programmable gate arrays; message authentication; pipeline processing; ASIC; FPGA hardware implementation; HMAC performance; SHA-1 hash function; digital signature; keyed-hash message authentication code; parallel functionality; pipeline processing; shared secret key; throughput; Design engineering; Digital signatures; Field programmable gate arrays; Hardware; Laboratories; Message authentication; Pipelines; Security; Throughput; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits and Systems, 2004. ICECS 2004. Proceedings of the 2004 11th IEEE International Conference on

Print_ISBN

0-7803-8715-5

Type

conf

DOI

10.1109/ICECS.2004.1399744

Filename

1399744