DocumentCode
2659267
Title
Design and simulation of strained Si/SiGe dual channel MOSFETs
Author
Goyal, Puneet ; Moon, James E. ; Kurinec, Santosh K.
Author_Institution
Rochester Inst. of Technol., Rochester
fYear
2007
fDate
12-14 Dec. 2007
Firstpage
1
Lastpage
2
Abstract
This paper reports the design, modeling and simulation of NMOS and PMOS transistors with a tensile strained Si channel layer and compressively strained SiGe channel layer for a 65 nm logic technology node. A unified modeling approach consisting of different physics based models has been formulated in this work and their ability to predict the device behavior has been investigated.
Keywords
Ge-Si alloys; MOSFET; NMOS transistor; PMOS transistor; dual channel MOSFET; strained Si-SiGe channel layer; Analytical models; Germanium silicon alloys; MOS devices; MOSFETs; Paper technology; Photonic band gap; Physics; Predictive models; Silicon germanium; Substrates;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Device Research Symposium, 2007 International
Conference_Location
College Park, MD
Print_ISBN
978-1-4244-1892-3
Electronic_ISBN
978-1-4244-1892-3
Type
conf
DOI
10.1109/ISDRS.2007.4422396
Filename
4422396
Link To Document