DocumentCode
2660378
Title
Transaction level modeling: an overview
Author
Cai, Lukai ; Gajski, Daniel
Author_Institution
Center for Embedded Comput. Syst., California Univ., Irvine, CA, USA
fYear
2003
fDate
1-3 Oct. 2003
Firstpage
19
Lastpage
24
Abstract
Recently, the transaction-level modeling has been widely referred to in system-level design community. However, the transaction-level models (TLMs) are not well defined and the usage of TLMs in the existing design domains, namely modeling, validation, refinement, exploration, and synthesis, is not well coordinated. This paper introduces a TLM taxonomy and compares the benefits of TLMs´ use.
Keywords
hardware-software codesign; systems analysis; transaction processing; TLM taxonomy; system-level design community; transaction level modeling; transaction-level model; validation; Computational modeling; Computer architecture; Embedded computing; Permission; Productivity; System-level design; System-on-a-chip; Tail;
fLanguage
English
Publisher
ieee
Conference_Titel
Hardware/Software Codesign and System Synthesis, 2003. First IEEE/ACM/IFIP International Conference on
Conference_Location
Newport Beach, CA, USA
Print_ISBN
1-58113-742-7
Type
conf
DOI
10.1109/CODESS.2003.1275250
Filename
1275250
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