• DocumentCode
    2663038
  • Title

    Multiprocessor reconfiguration techniques

  • Author

    Aggarwal, J.K. ; Yalamanchili, S.

  • Author_Institution
    Coll. of Eng., Texas Univ., Austin, TX, USA
  • fYear
    1988
  • fDate
    7-9 Jun 1988
  • Firstpage
    2749
  • Abstract
    The authors provide a summary of recent approaches to designing reconfigurable multiprocessor architectures. It is suggested that it has become evident that multiprocessor architectures based on static interconnection topologies are clearly limited in the range of computations that they can efficiently support. Two classes of reconfiguration techniques can be identified that enable multiprocessor architectures to adapt to the varying computational requirements that are encountered in applications such as image processing, i.e. system level reconfiguration and resource level reconfiguration. Highly structured, synchronous computations tend to be amenable to static reconfiguration techniques, while the more unstructured computations require techniques, both at the system level and processing-element level, that can adapt to run-time reconfiguration requests
  • Keywords
    computer architecture; computerised picture processing; multiprocessing systems; computational requirements; image processing; multiprocessor architectures; reconfigurable multiprocessor architectures; resource level reconfiguration; run-time reconfiguration; static interconnection topologies; static reconfiguration techniques; system level reconfiguration; Availability; Computer architecture; Computer vision; Degradation; Drives; Educational institutions; Image processing; Partitioning algorithms; Reconfigurable architectures; Topology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1988., IEEE International Symposium on
  • Conference_Location
    Espoo
  • Type

    conf

  • DOI
    10.1109/ISCAS.1988.15508
  • Filename
    15508