• DocumentCode
    2663804
  • Title

    An algorithm to detect positive cycles in a constraint graph for layout compaction

  • Author

    Ishima, Kunihiko ; Tsukiyama, Shuji ; Shinoda, Shoji

  • Author_Institution
    Dept. of Electr. & Electron. Eng., Chuo Univ., Tokyo, Japan
  • fYear
    1990
  • fDate
    1-3 May 1990
  • Firstpage
    2853
  • Abstract
    The problems of finding positive cycles and calculating the longest path lengths in a given constraint graph are considered. An O( b S(n,m)) time algorithm is proposed, where n, m, and b are the numbers of vertices, edges, and backward edges (corresponding to the user-defined design rules) in the graph, and S(n,m) is the time needed in the Dijkstra algorithm. Experimental results are shown
  • Keywords
    circuit layout; graph theory; network topology; Dijkstra algorithm; constraint graph; layout compaction; longest path lengths; Algorithm design and analysis; Compaction; Design automation; Large Hadron Collider; Large scale integration; Upper bound;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1990., IEEE International Symposium on
  • Conference_Location
    New Orleans, LA
  • Type

    conf

  • DOI
    10.1109/ISCAS.1990.112605
  • Filename
    112605