• DocumentCode
    2664645
  • Title

    A 100 MHz 40-tap programmable FIR filter chip

  • Author

    Hatamian, Mehdi ; Rao, Sailesh K.

  • Author_Institution
    AT&T Bell Lab., Holmdel, NJ, USA
  • fYear
    1990
  • fDate
    1-3 May 1990
  • Firstpage
    3053
  • Abstract
    The design and implementation of a single-chip programmable 40-tap finite impulse response (FIR) filter in 0.9 μ CMOS technology is described. The chip is fabricated and tested at sample rates up to 100 MHz. It performs over four billion multiply-add operations (12×10 bit multiplications and 26-bit additions) per second in less than 22 mm 2 of silicon area while dissipating about 3.1 W of power
  • Keywords
    CMOS integrated circuits; digital filters; 0.9 micron; 3.1 W; 40-tap programmable FIR filter chip; CMOS technology; finite impulse response; multiply-add operations; sample rates; silicon area; Adders; Computer architecture; Digital filters; Filtering; Finite impulse response filter; Logic; Pipeline processing; Registers; Signal processing algorithms; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1990., IEEE International Symposium on
  • Conference_Location
    New Orleans, LA
  • Type

    conf

  • DOI
    10.1109/ISCAS.1990.112656
  • Filename
    112656
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2664645