A 109dB PSRR, 31µW fully-MOSFET bandgap voltage reference in 0.13µm CMOS technology

A new technique to improve the power supply rejection ratio (PSRR) in bandgap voltage references is described in this paper. The conventionally used NPN transistors are replaced by MOS transistors which are biased in the weak inversion region. The proposed virtually diode-connected biasing scheme for MOS transistors significantly increases the loop gain, thus reducing the system sensitivity and consequently increasing the PSRR. The circuit is designed in a standard 0.13 μm CMOS technology and the simulation results show a PSRR of 109 dB at DC. The variation of the reference voltage V_REF over temperature range from -55°C to 125°C is only 12 mV which is translated to a temperature coefficient of 65 ppm/°C. It dissipates 31 μw from a 0.9 V-1.2 V supply voltage.