DocumentCode
2665522
Title
Novel high speed and ultra low voltage CMOS flip-flops
Author
Berg, Y.
Author_Institution
Dept. of Inf., Univ. of Oslo, Oslo, Norway
fYear
2010
fDate
12-15 Dec. 2010
Firstpage
293
Lastpage
296
Abstract
In this paper we present novel ultra-low-voltage (ULV) CMOS flip-flops (FF). The FFs offer increased speed compared to conventional CMOS FF for ultra low supply voltages. ULV logic FFs can be operated at a clock frequency more than 10 times than the maximum clock frequency of more conventional CMOS FFs for ultra low supply voltages. The simulated data presented is obtained using the Spectre simulator provided by Cadence and valid for a 90 nm STM CMOS process. Monte Carlo simulations applying both mismatch and process variations are performed.
Keywords
CMOS logic circuits; Monte Carlo methods; flip-flops; high-speed integrated circuits; CMOS FF; Cadence; Monte Carlo simulations; STM CMOS process; Spectre simulator; ULV CMOS flip-flops; high-speed voltage CMOS flip-flops; mismatch variation; process variation; size 90 nm; ultralow-voltage CMOS flip-flops; CMOS integrated circuits; Clocks; Flip-flops; Low voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits, and Systems (ICECS), 2010 17th IEEE International Conference on
Conference_Location
Athens
Print_ISBN
978-1-4244-8155-2
Type
conf
DOI
10.1109/ICECS.2010.5724511
Filename
5724511
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