VB-DVFS: A new algorithm for power efficiency of CMP with GALS

Author

Wei, Duan ; Fei, Fan Qi ; Kun, Huang ; Ge, Zhang

Author_Institution

Inst. of Comput. Technol., Chinese Acad. of Sci., Beijing, China

fYear

2010

fDate

12-15 Dec. 2010

Firstpage

297

Lastpage

300

Abstract

The advent of era of multi-core makes power consumption being the prime constraint of microprocessor design. The globally asynchronous locally synchronous (GALS) design of distributed clock network can excellently improve the power efficiency of single-chip multiprocessor (CMP) using dynamic voltage and frequency scaling (DVFS) policy. This paper proposes a new DVFS algorithm, which is used on CMP with GALS technology. The new algorithm, named Voting Based DVFS (VB-DVFS), dynamically adjusts voltage and frequency of processors in CMP according to the information of architecture and program behaviors. According to the experimental results, our algorithm reduces 24.8% power consumption, while just causing 9.9% performance loss.

Keywords

integrated circuit design; microprocessor chips; CMP power efficiency; GALS design; VB-DVFS algorithm; distributed clock network; dynamic voltage-frequency scaling; microprocessor design; single-chip multiprocessor; voting-based DVFS algorithm; Algorithm design and analysis; Clocks; Dynamic Voltage Frequency Scaling; Globally Asynchronous Locally Synchronous; Power Efficiency; Single-Chip Multiprocessor;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits, and Systems (ICECS), 2010 17th IEEE International Conference on

Conference_Location

Athens

Print_ISBN

978-1-4244-8155-2

Type

conf

DOI

10.1109/ICECS.2010.5724512

Filename

5724512