Novel FinFET domino logic circuit using dual keepers

Extreme power density due to leakage currents and scaling of CMOS technology in the nanometer region using single gate MOSFET has become tentative. To alleviate this situation double gate devices like the FinFET can be used, which provide significantly lower leakage and considerably superior control over the current through it. In this paper we utilize the property of FinFET to switch dynamically between low and high threshold devices to design a novel domino logic style circuit configuration. Domino logic circuits are preferred for high speed operations but they suffer from considerable power loss. The proposed dual keeper domino logic circuit achieves the performance of traditional domino logic with significantly reduced power consumption and increased evaluation speed while maintaining similar input noise margin.