• DocumentCode
    266882
  • Title

    Error detection & correction using horizontal-vertical-diagonal-shift method

  • Author

    Sadi, Muhammad Sheikh ; Rahman, Md Saifur ; Imrul Kayes Sikdar, K.M.

  • Author_Institution
    Dept. of Comput. Sci. & Eng., Khulna Univ. of Eng. & Technol., Khulna, Bangladesh
  • fYear
    2014
  • fDate
    10-12 April 2014
  • Firstpage
    1
  • Lastpage
    7
  • Abstract
    This paper proposes a novel approach to detect and correct multi bit upsets using horizontal-vertical-diagonal-shift (HVDS) parity. Many of the errors occur when information is transmitted from one node to another node. Detection and correction of these errors is a must for many systems e.g. safety critical systems. Existing work on error detection and correction cover up to three bit errors (as far reviewed) in a data word. The proposed method can detect and correct up to 7 bit errors. Experimental studies show the effectiveness of the proposed method in comparison to existing dominant work.
  • Keywords
    error correction; error detection; safety-critical software; HVDS parity; error correction; error detection; horizontal-vertical-diagonal-shift method; horizontal-vertical-diagonal-shift parity; safety critical systems; Arrays; Complexity theory; Fault tolerance; Fault tolerant systems; Real-time systems; Receivers; Software; Diagonal Parity; Error Detection and Correction; Fault Tolerance; Horizontal Parity; Shift Parity; Vertical Parity;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electrical Engineering and Information & Communication Technology (ICEEICT), 2014 International Conference on
  • Conference_Location
    Dhaka
  • Print_ISBN
    978-1-4799-4820-8
  • Type

    conf

  • DOI
    10.1109/ICEEICT.2014.6919061
  • Filename
    6919061