Low-complex BPSK demodulation using absolute comparison

A new CMOS-friendly BPSK demodulation method is presented to reduce circuit complexity without degrading performance. The proposed method compares absolute values of in-phase and quadrature-phase signals to select the larger one to be converted to a digital value. The digital value is reversed when the inversion case is detected. A simple double-balanced mixer and an efficient absolute current comparison block are proposed and implemented with 0.18μm CMOS technology. Compared to the traditional demodulator, the proposed demodulator can reduce power consumption and area requirement by eliminating complex analog components.