• DocumentCode
    2683238
  • Title

    Multipurpose quick 3D packaging process

  • Author

    Yongrui, Zhao ; Hongbo, Ma ; Minglu, Bi ; Zhanwu, Huang ; Jun, Jia ; Xinquan, Lai

  • Author_Institution
    Inst. of Electron. CAD, Xidian Univ., Xi´´an, China
  • fYear
    2011
  • fDate
    25-28 Oct. 2011
  • Firstpage
    287
  • Lastpage
    290
  • Abstract
    A novel small-sized chip circuit auxiliary layer (SCCAL) multipurpose 3D package process in order to solve the problem of shortages in flexibility and diversity of the traditional through-silicon via (TSV) process is presented in this paper. It meets the requirement of large amount of silicon dies which need connecting together by TSV technology but were designed respectively that wafers were processed without via holes drilling. This process involves a small-sized chip circuit auxiliary layer which is used as a carrying base and connecting auxiliary layer. Also, an improved TSV technology is involved that via holes could be produced through the PADs in the silicon dies. It is verified that, the whole process time of 3D packaging process is shortened drastically and the flexibility of the 3D packaging is greatly improved.
  • Keywords
    integrated circuit packaging; three-dimensional integrated circuits; TSV technology; carrying base layer; connecting auxiliary layer; multipurpose quick 3D packaging process; silicon dies; small-sized chip circuit auxiliary layer; through-silicon via process; via holes drilling; Copper; Joining processes; Packaging; Silicon; Three dimensional displays; Through-silicon vias;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Advanced Packaging Materials (APM), 2011 International Symposium on
  • Conference_Location
    Xiamen
  • ISSN
    1550-5723
  • Print_ISBN
    978-1-4673-0148-0
  • Type

    conf

  • DOI
    10.1109/ISAPM.2011.6105718
  • Filename
    6105718