Multiple communication-domains design in FPGA-based Systems-on-Chip

The increasing complexity of modern digital devices demands for ever increasing communication requirements, and for an ever increasing heterogeneity of the target applications. Specifically, different communication domains may be implemented using the same chip area, for instance to allow multiple parallel applications to be loaded onto the device. A flexible, reliable yet performant communication infrastructure is hereby proposed, to ensure inter-domain communication and cooperation. A novel communication-centric design is proposed to easily integrate classical bus-based systems with Network-on-Chip architectures, taking directly into consideration the resource requirements of the target FPGA device.