DocumentCode
2684451
Title
Package switching noise evaluation using boundary scan circuitry
Author
Games, Edward ; Shrivastava, Udy ; Liao, J.C.
Author_Institution
Intel Corp., Chandler, AZ, USA
fYear
1996
fDate
28-31 May 1996
Firstpage
733
Lastpage
738
Abstract
This paper describes a method for evaluating simultaneous switching noise (SSN) of microprocessors. To control the switching of I/O buffers, the boundary scan architecture implemented on processors is employed. For this experiment, the on die periphery power supply noise was measured with up to 130 simultaneously switching output buffers. The method of exercising the device is described and the results of SSN measurement are presented
Keywords
boundary scan testing; computer testing; integrated circuit noise; integrated circuit packaging; integrated circuit testing; microprocessor chips; switching; I/O buffers switching; boundary scan circuitry; microprocessors; on die periphery power supply noise; package switching noise evaluation; Bonding; Circuit noise; Circuit testing; Connectors; Microprocessors; Noise measurement; Packaging; Power supplies; Switching circuits; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components and Technology Conference, 1996. Proceedings., 46th
Conference_Location
Orlando, FL
ISSN
0569-5503
Print_ISBN
0-7803-3286-5
Type
conf
DOI
10.1109/ECTC.1996.517466
Filename
517466
Link To Document