DocumentCode
2686689
Title
Task scheduling and management in single-chip multi-processor system
Author
HuYue-li, HuYue-li ; WangYao-ming, WangYao-ming ; XuanXiang-guang, XuanXiang-guang
Author_Institution
Sch. of Mechatron. & Autom., Shanghai Univ., Shanghai
fYear
2008
fDate
28-31 July 2008
Firstpage
1
Lastpage
4
Abstract
The single-chip multi-processor system, which uses the technique of parallel processing, can well improve the performance and processing ability of the CPU. This paper proposes a method of parallel processing based on the task library, and presents a strategy about task distribution and scheduling. It has been implemented by hardware and the verification about task loading and task scheduling has made, based on a single chip multi-processor system, comprised of 4 sub-processors which are all based on the architecture of Intel 8051. The verification result indicates that this method can well improve the working efficiency and parallel computing ability of SCMP system.
Keywords
microprocessor chips; multiprocessing systems; parallel processing; processor scheduling; Intel 8051; SCMP system; parallel processing; single-chip multiprocessor system; task distribution; task library; task management; task scheduling; Computer architecture; Frequency; Hardware; Libraries; Microelectronics; Microprocessors; Parallel processing; Parallel programming; Processor scheduling; Programming profession;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Packaging Technology & High Density Packaging, 2008. ICEPT-HDP 2008. International Conference on
Conference_Location
Shanghai
Print_ISBN
978-1-4244-2739-0
Electronic_ISBN
978-1-4244-2740-6
Type
conf
DOI
10.1109/ICEPT.2008.4607012
Filename
4607012
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