DocumentCode
2688749
Title
4 Gb/s ECL gate masterslice
Author
Tamamura, Masaya ; Emori, Shinji ; Watanabe, Yoshio ; Shimotsuhama, Lsao ; Kikuchi, Naoyoshi ; Ishibashi, Wataru ; Tachibana, Kaoru
fYear
1989
fDate
15-18 May 1989
Abstract
The authors present a novel semicustom IC called the gate masterslice, which enables a clear eye pattern to be obtained for high-bit-rate signals. Key design features of the gate masterslice are: an advanced Si bipolar process, chip structure that reduces signal interference rather than increasing gate density, and internal connection using only the second metal layer
Keywords
application specific integrated circuits; cellular arrays; emitter-coupled logic; logic arrays; 4 Gbit/s; ASIC; ECL; advanced Si bipolar process; chip structure; emitter coupled logic; gate masterslice; high-bit-rate signals; internal connection; second metal layer; semicustom IC; signal interference reduction;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 1989., Proceedings of the IEEE 1989
Conference_Location
San Diego, CA, USA
Type
conf
DOI
10.1109/CICC.1989.56757
Filename
5726224
Link To Document