• DocumentCode
    2688834
  • Title

    0.6-μm 12 K-gate ECL gate array with RAM and ROM

  • Author

    Nishimura, T. ; Satoh, H. ; Tatsuki, M. ; Ohba, A. ; Hine, S. ; Uga, K. ; Kuramitsu, Y.

  • fYear
    1989
  • fDate
    15-18 May 1989
  • Abstract
    A 12 K-gate ECL (emitter-coupled logic) gate array with dedicated memory has been developed using 0.6-μm bipolar process technology. The memory is available for RAM or ROM storage. The gate array can also be used to implement a configurable RAM having internal cells
  • Keywords
    bipolar integrated circuits; emitter-coupled logic; logic arrays; random-access storage; read-only storage; 0.6 micron; ECL gate array; ROM; bipolar process technology; configurable RAM; dedicated memory; emitter-coupled logic;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Custom Integrated Circuits Conference, 1989., Proceedings of the IEEE 1989
  • Conference_Location
    San Diego, CA, USA
  • Type

    conf

  • DOI
    10.1109/CICC.1989.56763
  • Filename
    5726230
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2688834