Dominant pole(s)/zero(s) analysis for analog circuit design

A prototype frequency-domain simulator that models the nth-order circuit by a lower order q-model has been developed. It combines results equivalent to hand analysis with variable order numerical pole-zero approximation. The dominant poles and zeros, including those that are complex or repeated, are found efficiently on recursive DC analysis of the circuit. In addition, the effect of the variation of element values on the pole locations can be obtained at an incremental cost in CPU time