DocumentCode
2689822
Title
Efficient memory architecture for fast total_zeros decoding in H.264/AVC CAVLC decoder
Author
Moon, Yong Ho ; Eom, Il Ku ; Ha, Suk Woon
Author_Institution
Div. of Comput. Sci., Gyeongsang Nat. Univ., Jinju
fYear
2008
fDate
June 23 2008-April 26 2008
Firstpage
65
Lastpage
68
Abstract
A large amount of memory accesses are required for CAVLC decoding in the H.264/AVC baseline profile. It is an important issue for low-power implementation of mobile video applications because the memory access function results in considerable power consumption. We have found some distinctive features in the variable-length code table (VLCT) of total_zeros element through a careful analysis of the codeword. Based on these features, efficient memory architecture is designed and new decoding method is developed in this paper. The simulation results show that the new decoding with the proposed memory architecture achieves an approximately 80~90% memory access saving compared to conventional decoding.
Keywords
adaptive codes; adaptive decoding; memory architecture; variable length codes; video coding; H.264/AVC CAVLC decoder; efficient memory architecture; memory access function; mobile video application; total_zeros decoding; variable-length code table; Automatic voltage control; Broadcasting; Computer science; Decoding; Energy consumption; Memory architecture; Multimedia communication; Power engineering and energy; Teleconferencing; Video coding; CALVC; H.264/AVC; Memory Access; Total_zeros; VLCT;
fLanguage
English
Publisher
ieee
Conference_Titel
Multimedia and Expo, 2008 IEEE International Conference on
Conference_Location
Hannover
Print_ISBN
978-1-4244-2570-9
Electronic_ISBN
978-1-4244-2571-6
Type
conf
DOI
10.1109/ICME.2008.4607372
Filename
4607372
Link To Document