DocumentCode
2689920
Title
A 32-bit hybrid microprocessor design for multimedia applications
Author
Shan Rui ; Hong Ying ; Wang Dong-hui ; Zhang Tie-jun ; Yu Qian ; Hou Chao-huan
Author_Institution
Inst. of Acoustics, Chinese Acad. of Sci., Beijing, China
Volume
1
fYear
2003
fDate
21-24 Oct. 2003
Firstpage
385
Abstract
A high performance hybrid microprocessor based on VLIW and SIMD techniques is presented in this paper. Many techniques such as predication, speculation, short-vector and reconfiguration techniques are also used in this 4-issued VLIW hybrid microprocessor. Evaluation shows that the combination of these techniques can be elegantly to achieve much better performance. When performing typical video-processing functions, the hybrid microprocessor can execute 19 operations per cycle. At 200 MHZ clock frequency, the hybrid chip can compute at 3.6 billion operations per second (GOPS). It can be used in multimedia-rich applications, including audio/video, network communication and other consumer products.
Keywords
integrated circuit design; microprocessor chips; multiprocessing systems; parallel processing; 200 MHz; 32 bit hybrid microprocessor design; SIMD techniques; VLIW hybrid microprocessor; VLIW techniques; clock frequency; consumer products; hybrid chip; multimedia applications; network communication; predication techniques; reconfiguration techniques; single instruction multiple data; speculation techniques; very long instruction word; video processing functions;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2003. Proceedings. 5th International Conference on
ISSN
1523-553X
Print_ISBN
0-7803-7889-X
Type
conf
DOI
10.1109/ICASIC.2003.1277568
Filename
1277568
Link To Document