DocumentCode
2690556
Title
Integration of CMOS avalanche photodiodes evaluation and comparison of their global performances
Author
Moutaye, Emmanuel R. ; Tap-Beteille, Hélène
Author_Institution
Electron. Lab. of INPT-ENSEEIHT, Univ. de Toulouse, Toulouse, France
fYear
2010
fDate
3-6 May 2010
Firstpage
1373
Lastpage
1376
Abstract
This paper presents the design of two avalanche photodiodes (APDs) in standard 0.35 μm CMOS technology. Simulations with SILVACO suite allowed the design optimisation, the architectures to be validated and the global performances to be predicted. Two kinds of guard ring structures have been developed, simulated and validated. The P+N APD presents the best reponsivity with a peak around 550 nm. The N+P APD presents a peak of responsivity around 450 nm. At the opposite, the excess noise factor is better for the N+P structure. Finally, when biased at -6V and for λ = 450 nm the photoelectric gain of the N+P structure is equal to 100 whereas the P+N structure one is equal to 60 at λ = 550 nm.
Keywords
CMOS integrated circuits; avalanche photodiodes; APD; CMOS avalanche photodiodes evaluation; SILVACO suite; design optimisation; guard ring structures; noise factor; photoelectric gain; size 0.35 mum; size 450 nm; size 550 nm; Avalanche photodiodes; CMOS technology; Doping; High speed optical techniques; Indium phosphide; Laboratories; Optical device fabrication; Optical devices; Optical sensors; Performance evaluation; AvalanchePhotodiode (APD); CMOS integration; Optoelectronics;
fLanguage
English
Publisher
ieee
Conference_Titel
Instrumentation and Measurement Technology Conference (I2MTC), 2010 IEEE
Conference_Location
Austin, TX
ISSN
1091-5281
Print_ISBN
978-1-4244-2832-8
Electronic_ISBN
1091-5281
Type
conf
DOI
10.1109/IMTC.2010.5488284
Filename
5488284
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