• DocumentCode
    2696410
  • Title

    Pulse-processing neural net hardware with selectable topology and adaptive weights and delays

  • Author

    Beerhold, J.R. ; Jansen, M. ; Eckmiller, R.

  • fYear
    1990
  • fDate
    17-21 June 1990
  • Firstpage
    569
  • Abstract
    A completely parallel, asynchronous, pulse-processing neural net has been described. This hardware simulator is fabricated with discrete electronic elements. A variety of basic biological parameters are efficiently incorporated in the hardware. It is noteworthy that the concept uses neural activity to modify synaptic weights and time delays. It follows that learning rules are embedded in the net topology
  • Keywords
    neural nets; topology; virtual machines; adaptive weights; biological parameters; hardware simulator; net topology; neural activity; pulse-processing neural net; synaptic weights; time delays;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Neural Networks, 1990., 1990 IJCNN International Joint Conference on
  • Conference_Location
    San Diego, CA, USA
  • Type

    conf

  • DOI
    10.1109/IJCNN.1990.137767
  • Filename
    5726725