DocumentCode
2697556
Title
Analysis of HCS in STI-based LDMOS transistors
Author
Reggiani, Susanna ; Poli, Stefano ; Gnani, Elena ; Gnudi, Antonio ; Baccarani, Giorgio ; Denison, Marie ; Pendharkar, Sameer ; Wise, Rick ; Seetharaman, Sridhar
Author_Institution
Dept. of Electron., Univ. of Bologna, Bologna, Italy
fYear
2010
fDate
2-6 May 2010
Firstpage
881
Lastpage
886
Abstract
A numerical investigation of the hot-carrier behavior of a lateral DMOS transistor with shallow trench isolation (STI) is carried out. The measured drain-current degradation induced by hot-carrier stress (HCS) is nicely reproduced by TCAD results revealing that interface traps are mainly formed at the STI corner close to the channel. The effect of typical device design variations on hot-carrier degradation is analyzed.
Keywords
MOSFET; hot carriers; numerical analysis; technology CAD (electronics); HCS analysis; STI-based LDMOS transistors; TCAD results; drain-current degradation; hot carrier stress; interface traps; numerical investigation; shallow trench isolation; Data mining; Degradation; Equations; Hot carriers; Kinetic theory; Predictive models; Pulse measurements; Semiconductor optical amplifiers; Solid modeling; Stress; Hot-carrier stress; LDMOS; TCAD analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
Reliability Physics Symposium (IRPS), 2010 IEEE International
Conference_Location
Anaheim, CA
ISSN
1541-7026
Print_ISBN
978-1-4244-5430-3
Type
conf
DOI
10.1109/IRPS.2010.5488712
Filename
5488712
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