DocumentCode
2697648
Title
Mapping asynchronous parallel simulation on a network of workstations
Author
Tay, Seng Chuan ; Teo, Yong Meng
Author_Institution
Dept. of Inf. Syst. & Comput. Sci., Nat. Univ. of Singapore, Singapore
fYear
1996
fDate
3-6 Jun 1996
Firstpage
456
Lastpage
463
Abstract
This paper examines the performance of mapping schemes used in parallel simulation on a network of workstations. A conservative parallel simulation of multistage interconnection networks is used as an example in our analytical model. Performance metrics such as elapsed time, speedup and simulation bandwidth associated with different schemes for partitioning/mapping parallel simulation onto physical processors are evaluated. Our studies show that a perfectly balanced workload distribution may not necessary translate into better performance. We also show in both analytical and implementation results that inter-processors communication overheads incurred in a balanced mapping may occasionally cause dominant aggravation to the program elapsed time
Keywords
digital simulation; multistage interconnection networks; performance evaluation; asynchronous parallel simulation mapping; balanced mapping; elapsed time; inter-processors communication; multistage interconnection networks; network of workstations; partitioning; performance evaluation; performance metrics; physical processors; simulation bandwidth; Analytical models; Computational modeling; Computer science; Information systems; Multiprocessor interconnection networks; Packet switching; Performance analysis; Runtime; Switches; Workstations;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel and Distributed Systems, 1996. Proceedings., 1996 International Conference on
Conference_Location
Tokyo
Print_ISBN
0-8186-7267-6
Type
conf
DOI
10.1109/ICPADS.1996.517594
Filename
517594
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