DocumentCode
2701733
Title
BANCMOS: a 25 V mixed analog-digital BiCMOS process
Author
Kendall, J. ; Rioux, B. ; Kempf, P. ; Bourbonnais, L. ; Feeley, M. ; Hadaway, R.
Author_Institution
Northern Telecom Electron. Ltd., Nepean, Ont., Canada
fYear
1990
fDate
17-18 Sep 1990
Firstpage
86
Lastpage
89
Abstract
A 25-V mixed analog-digital BiCMOS process is presented that provides seven types of transistors (five bipolar, two MOS) with a linear polysilicon capacitor and polysilicon resistor in double-level metal using only 19 masks. Device and circuit performance is summarized. This manufacturable process with a large device set capable of 25-V operation and reasonable speed has proven itself useful for high-performance applications
Keywords
BIMOS integrated circuits; application specific integrated circuits; integrated circuit technology; 25 V; BANCMOS; circuit performance; device performance; double-level metal; high-performance applications; linear polysilicon capacitor; mixed analog-digital BiCMOS process; polysilicon resistor; Analog circuits; Analog-digital conversion; BiCMOS integrated circuits; Doping profiles; MOS capacitors; MOS devices; MOSFETs; Resistors; Substrates; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Bipolar Circuits and Technology Meeting, 1990., Proceedings of the 1990
Conference_Location
Minneapolis, MN
Type
conf
DOI
10.1109/BIPOL.1990.171133
Filename
171133
Link To Document