• DocumentCode
    2702938
  • Title

    Development of simulation-approach for 3D chip stacking with fine-pitch array-type microbumps

  • Author

    Chang-Chun Lee ; Tzai-Liang Tzeng ; Pei-Chen Huang

  • Author_Institution
    Dept. of Mech. Eng., Chung Yuan Christian Univ., Chungli, Taiwan
  • fYear
    2015
  • fDate
    14-17 April 2015
  • Firstpage
    514
  • Lastpage
    517
  • Abstract
    A robust finite element analysis (FEA) is beneficial to quality the microbump assembly by using process-flow technique and to estimate subsequent thermo-mechanical reliability of critical microbump in a whole 3D-ICs packaging structure. However, the foregoing simulation work is time-consuming and becomes difficult to obtain a converged numerical result while thousands of microbumps with an array-type need to be taken into account simultaneously. For this reason, this research proposed a simulated technique to introduce an equivalent material composed of microbumps and their surrounding underfill. The mechanical properties of above-mentioned equivalent material, including Young´s modulus, Poisson´s ratio, and coefficient of thermal extension are directly obtained applying a tensile load and giving a increment in temperature during FEA, respectively. The analytic results indicate that at least five microbumps at the outermost region of chip stacking structure need to be considered as an accurate stress/strain contour in concerned region is achieved.
  • Keywords
    Poisson ratio; Young´s modulus; fine-pitch technology; finite element analysis; integrated circuit manufacture; integrated circuit technology; thermal management (packaging); thermomechanical treatment; three-dimensional integrated circuits; 3D IC packaging structure; 3D chip stacking; FEA; Poissons ratio; Youngs modulus; fine-pitch array-type microbumps; finite element analysis; microbump assembly; process-flow technique; simulated technique; thermal extension coefficient; thermomechanical reliability; Assembly; Finite element analysis; Packaging; Strain; Stress; Young´s modulus; Assembly; Equivalent material properties; Finite element analysis; Microbump; Wafer level Underfill;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics Packaging and iMAPS All Asia Conference (ICEP-IACC), 2015 International Conference on
  • Conference_Location
    Kyoto
  • Print_ISBN
    978-4-9040-9012-1
  • Type

    conf

  • DOI
    10.1109/ICEP-IAAC.2015.7111068
  • Filename
    7111068