An experimental single-chip data flow CPU

The HPSm (high-performance substrate) single-chip data flow CPU is described. It enhances throughput by using three function units-two arithmetic and logic units (ALUs) and one memory interface-to exploit parallelism, while executing reduced instruction set computer (RISC) instructions in a data-driven manner to keep the function units busy. By using three function units, it is capable of operating at a peak performance of 30 MIPs while running at 10 MHz. It employs four on-chip smart memories to control data-driven execution on the three function units and to support branch prediction and exception handling. It is implemented in a 1.6-μm double-metal CMOS process. The chip contains 87279 transistors, occupies an area of 13.83 mm×13.04 mm, and dissipates 2 W