DocumentCode
2707285
Title
A 470-μw multi-modulus injection-locked frequency divider with division ratio of 2, 3, 4, 5 and 6 in 0.13-μm CMOS
Author
Lee, Joonhee ; Cho, SeongHwan
Author_Institution
Korea Adv. Inst. of Sci. & Technol., Daejeon
fYear
2007
fDate
12-14 Nov. 2007
Firstpage
332
Lastpage
335
Abstract
This paper presents a multi-modulus injection-locked frequency divider (ILFD) based on a ring oscillator using inverter chains for a small area and low power consumption. In the proposed ILFD, division ratio of 2, 3, 4, 5 and 6 can be performed by selecting a specific loop which consists of a transmission gate and several delay cells. A prototype chip implemented in 0.13 mum CMOS process operates at 5 GHz while consuming 470 muW from 1.2 V supply, where 350 muW is dissipated in me core of the ILFD. The proposed ILFD is the first reported multi-modulus ILFD with a digitally controlled division ratio and the size of the ILFD is 44 times 33 mum2. This number is one of the smallest area that have been reported for a ILFD.
Keywords
CMOS logic circuits; MMIC oscillators; frequency dividers; low-power electronics; CMOS; delay cells; frequency 5 GHz; inverter chains; low power consumption; multimodulus injection-locked frequency divider; power 350 muW; power 470 muW; ring oscillator; size 0.13 mum; transmission gate; voltage 1.2 V; Digital control; Energy consumption; Frequency conversion; Frequency synchronization; Frequency synthesizers; Inverters; Low pass filters; Ring oscillators; Transceivers; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2007. ASSCC '07. IEEE Asian
Conference_Location
Jeju
Print_ISBN
978-1-4244-1359-1
Electronic_ISBN
978-1-4244-1360-7
Type
conf
DOI
10.1109/ASSCC.2007.4425698
Filename
4425698
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