• DocumentCode
    2710411
  • Title

    Optimal connectivity in hardware-targetted MLP networks

  • Author

    Rast, A.D. ; Welbourne, S. ; Jin, X. ; Furber, S.B.

  • Author_Institution
    Sch. of Comput. Sci., Univ. of Manchester, Manchester, UK
  • fYear
    2009
  • fDate
    14-19 June 2009
  • Firstpage
    2619
  • Lastpage
    2626
  • Abstract
    In large neural networks, partial connectivity is both biologically plausible and a matter of necessity when targetting a hardware implementation. We are using the SpiNNaker neural chip multiprocessor to model such networks as a drop-in replacement for the Lens network simulator. For the popular MLP network, a theoretical model of the relation between connectivity, network size and gain in the activation function provides a method to set these parameters to near-optimal values. Using the model, we run a series of network simulations in Lens, permuting the parameters to explore the effects in 2 networks of different size and application. Initial test results show a clear connectivity-gain relation and a benefit to partial connectivity in both networks, with optimal hidden-output connectivity values ranging from ~10%-~30% depending on the network type. We show that optimal connectivity-gain settings reduce training time, minimising error oscillations during learning. Preliminary analysis also suggests that while very low connectivities may improve error they may also result in decreased adaptivity to new inputs or component failure. These results in combination with the theoretical relation give a method for determining reasonable initial connectivity and gain values at design time for an MLP network, allowing more efficient use of hardware resources such as SpiNNaker and faster simulations in any software environment. They also suggest a different way of considering the problem of MLP network design: rather than specify a fixed number of neurons, specify a fixed number of connections and vary the number of neurons to reach optimal connectivity.
  • Keywords
    microprocessor chips; multilayer perceptrons; Lens network simulator; SpiNNaker neural chip multiprocessor; connectivity-gain relation; hardware-targetted MLP networks; multilayer perceptron; neural networks; optimal connectivity; optimal hidden-output connectivity; Biological neural networks; Biological system modeling; Computer architecture; Failure analysis; Lenses; Neural network hardware; Neural networks; Neurons; Statistics; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Neural Networks, 2009. IJCNN 2009. International Joint Conference on
  • Conference_Location
    Atlanta, GA
  • ISSN
    1098-7576
  • Print_ISBN
    978-1-4244-3548-7
  • Electronic_ISBN
    1098-7576
  • Type

    conf

  • DOI
    10.1109/IJCNN.2009.5178831
  • Filename
    5178831